英語翻譯
The J-K Flip-Flop.Another problem with the basic R-S flip-flop is the forbidden state at the input.This can be eliminated by ANDing the inputs with the output of the flip-flop,thus blocking one of the inputs,as shown in Fig.4.23.The added gates here have effect of inhibiting the 1 input to the gate whose output is 1.There-fore,the input which is passed will always change the state of the output.Thus the truth table for the J-K flip-flop is the same as the truth table in Fig.4.19,except that we indicate a change of output state for the hitherto forbidden input state.The J-K Flip-Flop thus gives us,in addition to a latched memory of the input,the capacity to “toggle” (A Lever-actuated switch,like the ordinary light on-off switch,is called a toggle switch.Thus to toggle means to switch from one state to another) when both inputs are 1.This toggle feature reveals why we must use edge triggering for this flip-flop; for if the clock pulse were extended in time,the state would oscillate back and forth and the eventual output would be indeterminent.The toggle mode of the J-K flip-flop is useful in counters and frequency dividers.