這個文章什么意思啊?LDO?
The proposed LDO has been implemented in AMS doublepoly
triple-metal 0.35- m CMOS technology. The threshold
voltages of nMOSFET and pMOSFET are 0.55 V and 0.75 V,
respectively. The chip micrograph is shown in Fig. 7, and the
active silicon area is 236 m* 529 m, excluding the testing
pads. The LDO can operate down to 1.2 V with a preset output
voltage of 1 V. The dropout voltage at output current of 100 mA
is 200 mV. The maximum ground current is about 100 A at
Vin=3.3V. The measured results are in Table II.我不是學(xué)這個的,實在是.雞肋,后面還有.這個翻譯好我一定加分的,在線等.